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هفتمین کنفرانس بین المللی میکروالکترونیک ایران
A 12-bit, 100-MS/s Two-Channel Time-Interleaved SAR ADC with a Novel Offset Error Cancellation Method
نویسندگان :
Seyed Kian Mousavikia
1
Majid Vatan Parast Aghdami
2
Morteza Mousazadeh
3
Khayrollah Hadidi
4
1- دانشگاه ارومیه
2- دانشگاه تبریز
3- دانشگاه ارومیه
4- دانشگاه ارومیه
کلمات کلیدی :
SAR ADC،Time-Interleaved،Offset Error Correction،Switched Capacitor Circuit،CMOS
چکیده :
This paper presents a 12-bit, two-channel time-interleaved successive approximation register (SAR) analog-to-digital converter (ADC). Each SAR ADC operates at a 50 MHz sampling rate, resulting in an overall sampling rate of 100 MHz for the dual-channel interleaved ADC. Also, a novel method is proposed to cancel the offset error of the dual-channel ADC by averaging the outputs of both ADCs. The ADC is simulated in a 0.18 µm CMOS 2P6M process, achieving an effective number of bits (ENOB) of 11.59 at the Nyquist frequency while consuming 10.44 mW of power from a 1.8 V supply.
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بیشتر
ثمین همایش، سامانه مدیریت کنفرانس ها و جشنواره ها - نگارش 43.4.0
