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هفتمین کنفرانس بین المللی میکروالکترونیک ایران
Design of a time difference amplifier using phase-locked loop circuit blocks
نویسندگان :
Sina Bakhshi
1
Mehdi Ehsanian
2
1- دانشگاه صنعتی خواجه نصیرالدین طوسی
2- دانشگاه صنعتی خواجه نصیرالدین طوسی
کلمات کلیدی :
time difference amplifier (TDA)،time amplifier (TA)،phase-locked loop (PLL)،time difference circuit،time-domain processing
چکیده :
This paper presents a novel time difference amplifier architecture, implemented by repurposing functional blocks from a phase-locked loop (PLL) circuit. In the proposed design, the phase–frequency detector and charge pump operate in a manner analogous to their roles within a conventional PLL, but are reconfigured to realize time-domain signal amplification. The circuit is implemented in 180 nm CMOS technology (TSMC) with a 1.8 V supply voltage. The amplifier achieves an input dynamic range from 20 ns to 250 ns, with a gain error ranging from –10.8% to +9.23% over this interval. The time gain is tunable between 3 and 9, enabling classification of the design as a variable-gain time difference amplifier. At an operating frequency of 100 MHz, the proposed circuit consumes only 1.14 mW, making it suitable for time-domain processing applications.
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بیشتر
ثمین همایش، سامانه مدیریت کنفرانس ها و جشنواره ها - نگارش 43.4.0
