کنفرانس بین المللی میکروالکترونیک ایران

صفحه اصلی / هفتمین کنفرانس بین المللی میکروالکترونیک ایران

FPGA-Based CNN Accelerator with High Computing Resource Utilization

نویسندگان :

Raziyeh Foroumandi¹ Behbood Mashoufi² Amir Fathi³

1- دانشگاه ارومیه 2- دانشگاه ارومیه 3- دانشگاه ارومیه

کلمات کلیدی :

Convolutional neural networks (CNNs)،FPGA-based accelerator،parallel computing

چکیده :

The rapid advancement of Convolutional Neural Networks (CNNs) has created a growing demand for hardware accelerators capable of performing CNN inference efficiently. FPGA-based CNN accelerators are particularly attractive due to their high performance, low power consumption, and inherent reconfigurability. This work presents an FPGA-based CNN accelerator employing a multi-computing engine architecture for convolution operations to enhance computational efficiency and achieve high throughput. The design exploits multiple levels of parallelism with optimized parallelism parameters, a data reordering unit to ensure continuous data delivery to the Processing Element (PE) array without idle cycles, and an optimized buffer structure to maximize computing resource utilization. The proposed accelerator was evaluated on the Xilinx XC7VX690T FPGA using VGG16 benchmark. Results show computing efficiency of 98.92%, outperforming existing FPGA-based CNN accelerators.

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بیشتر

ثمین همایش، سامانه مدیریت کنفرانس ها و جشنواره ها - نگارش 42.5.4