کنفرانس بین المللی میکروالکترونیک ایران

صفحه اصلی / هفتمین کنفرانس بین المللی میکروالکترونیک ایران

An Accurate 10-bit 1 kS/s Charge-Redistribution SAR ADC for Sensor Readout Applications

نویسندگان :

Farshad Gozalpour¹ Sepehr Zare Teimoori² Kamyab Karimi Sarableh³ Rasoul Fathipour⁴ Mohsen Tamaddon⁵

1- دانشگاه صنعتی امیرکبیر 2- دانشگاه صنعتی خواجه نصیرالدین طوسی 3- دانشگاه صنعتی امیرکبیر 4- دانشگاه صنعتی امیرکبیر 5- دانشکده فنی و حرفه‌ای شهید شمسی‌پور تهران

کلمات کلیدی :

SAR ADC،charge redistribution،dynamic comparator،SAR logic،sample and hold،DAC

چکیده :

In this paper, the detailed design of a charge redistribution 10-bit successive approximation register (SAR) analog-to-digital converter (ADC) is presented. In this design, the schematic-level details of the SAR ADC components such as dynamic comparator, SAR logic, sample and hold (S&H) circuit, digital to analog converter (DAC), and output register are investigated. Also, considering the capacitor mismatch, the minimum acceptable unit capacitance of the SAR DAC is calculated that guaranties no missing codes. Using CMOS TSMC 180 nm, the designed 10-bit SAR ADC is simulated in cadence environment. With sample rate of 1 kS/s, supply voltage of 3 V, and input common mode voltage of 1.5 V, the maximum achieved effective number of bits (ENOB) and signal to noise and distortion ratio (SNDR) at TT corner, temperature of 27 °C, and input amplitude of -0.09 dBFS are simulated to be 9.98 bits, and 61.84 dB, respectively.