0% Complete
صفحه اصلی
/
هفتمین کنفرانس بین المللی میکروالکترونیک ایران
An Area-Efficient Low-Power Frequency-Doubler Circuit Implemented on Differential VCOs
نویسندگان :
Elham Sharifi
1
Sarang Kazeminia
2
Keyvan Ghorbani
3
1- دانشگاه صنعتی ارومیه
2- دانشگاه صنعتی ارومیه
3- دانشگاه تبریز
کلمات کلیدی :
Frequency Doubler،Frequency Synthesizer،Clock Generation،Low-Power Clock Management
چکیده :
An open-loop low-power and area-efficient frequency doubler circuit is introduced to be added on voltage-controlled delay elements. In some mixers and clock and data recovery (CDR) circuits, where phase locked loops (PLL) cannot satisfy the area and power constraints, the proposed circuit can be repeatedly used for local generation of multiples of 2N from the input frequency. The proposed frequency doubler can be implemented on a simple CMOS differential pair with complementary input clock applied to its inputs. Also, it can be applied as an add-on to voltage-controlled delay elements even in delay locked loops (DLLs) or voltage-controlled oscillators (VCO). A simple strategy is also introduced to primarily correct the duty cycle of the generated clock. Simulation results in a 180nm CMOS process at different corner conditions confirm that the frequency of input clock within the range of 10MHz-to-1.15GHz can be successfully doubled by consuming 3.8mW and 5.3mW power at 20MHz and 2.3GHz output frequencies, respectively, at 1.8Volts supply voltage. Applying the transient noise analysis, RMS jitter of the output clock reaches to 100pSec and 3.8pSec at 20MHz and 2.3GHz output frequencies, respectively.
لیست مقالات
لیست مقالات بایگانی شده
Neural networks & logistic regression for FPGA hardware trojan detection
Milad Pazira - Yasser Baleghi - Mohammad-Ali Mahmoodpour
A Common-mode Insensitive Regenerative Comparator with New Dynamic-Bias Technique for Low Supply Voltage Applications
Saba Iesakhani - Hadi Pahlevanzadeh
بررسی تأثیر اصلاحات ساختاری، بر روی عملکرد ترانزیستورهای مبتنی بر نانو نوارهای فسفرن سیاه
اکبر شعبانی - حسین کرمی طاهری
Design of a Compact Approximate Multiplier in QCA Technology Using a Three-Layer Architecture
Saeid Seyedi - Hatam Abdoli
طراحی آنتن تشدیدکننده دی الکتریک با استفاده از فرامواد برای سنجش و تشخیص مایعات
مریم بازگیر - اکرم شیخی
A 10-bit, 110-MS/s Synchronous SAR ADC Using a Split‑DAC Architecture with the new comparator
Sajjad Ali Abbasi Yaghmourali - Morteza Mousazadeh
An Area-Efficient Low-Power Frequency-Doubler Circuit Implemented on Differential VCOs
Elham Sharifi - Sarang Kazeminia - Keyvan Ghorbani
طراحی و شبیه سازی سوییچ و مدولاتور الکترواپتیک مبتنی بر گرافن در طیف مادون قرمز میا نی با بهره گیری از ساختار JFET
توفیق نورمحمدی
Analysis of electrostatic interaction between a charge trap and a quantum dot based single electron transistor
Fatemeh Hamedvasighi - Majid Shalchian
Efficiency enhancement of tin-based perovskite solar cell with carbon back-contact using cubic and pyramid metallic nano-particles: numerical investigation
Amir Hossein Mohammadian Fard - Samiye Matloub
بیشتر
ثمین همایش، سامانه مدیریت کنفرانس ها و جشنواره ها - نگارش 42.6.0