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پنجمین کنفرانس بین المللی میکروالکترونیک ایران
Design of a Calibration Circuit for Adaptive Phase-Locked Loop in the 5GHz Range Using CMOS 180nm Technology
نویسندگان :
Reza MirAlvandi (دانشگاه صنعتی خواجه نصیرالدین طوسی) , Mahdi Ehsanian (دانشگاه صنعتی خواجه نصیرالدین طوسی)
کلمات کلیدی :
Calibration،frequency synthesizer،adaptive phase-locked loop (PLL)
چکیده :
In this article, a phase-locked loop (PLL) with a digitally controlled calibration oscillator circuit has been designed for frequency adaptation. The adaptation process is performed digitally based on the performance of the oscillator. If the oscillator deviates from its frequency range, the active calibration circuitry detects the lock state and applies a corresponding digital code to the capacitor bank, ensuring that there is no need for user intervention to reprogram the PLL for frequency adjustment. The proposed circuit features a voltage-controlled oscillator (VCO) with a capacitor bank and a digital calibration circuit, which enables a wider range of output frequencies to be covered. The designed PLL circuit operates within the frequency range of 3 to 8.1 GHz using CMOS 180nm technology and has been simulated. The design achieves a frequency range variation of 500 MHz for the reference frequency, and the phase noise value at 10 MHz is measured at -122.71 dBc/Hz.
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